This invention relates to light-emitting diode (LED) drivers, and more particularly to an integrated LED driving device with current sharing for multiple LED strings in a DC mode and, alternately, with minimized phase delays in a PWM mode.
Driving large scale LED drivers for a large amount N of LED strings (such as, without limitation, in LC-TV direct backlight) requires complex circuitry and expensive controllers. Moreover, with existing technology, when the multiple LED strings are operated in a PWM mode, time delay variations are present between the controllers, which could cause different phases among the N LED strings.
Referring now to FIG. 1, a schematic diagram of a conventional LED driving device 1 for a single LED string 8 is shown and includes a simple linear regulator 5. Preferably, the LED string is driven with a specified constant current source which follows a constant reference current signal Iref at terminal 2a and a regulated DC input voltage source (NOT SHOWN), which delivers the DC input voltage VDC at terminal 3. The linear regulator 5 functions in a manner which maintains a constant LED current ILED. The general operation of the linear regulator 5 will now be described in detail below.
The LED current ILED is sensed via a sensing resistor R28. Operational amplifier (OP-AMP) U1 in combination with resistors R25 and R26 provides proper amplification so that the LED current ILED information is fed back to the negative or inverting terminal of the OP-AMP U2, the regulator""s controller. Resistor R25 is a feedback resistor coupled between the output terminal and the negative or inverting terminal of OP-AMP U1. Resistor R26 is coupled to the negative or inverting terminal of OP-AMP U1 and ground. The transfer function of OP-AMP U2 is expressed as                                           R            ⁢                          xe2x80x83                        ⁢            22                                R            ⁢                          xe2x80x83                        ⁢            23                          ⁢                  1                      1            +                          sR              ⁢                              xe2x80x83                            ⁢              22              ⁢              C              ⁢                              xe2x80x83                            ⁢              9                                                          Eq        .                  xe2x80x83                ⁢                  (          1          )                    
wherein s is a complex variable; resistor R22 is a feedback resistor coupled between the output terminal and the negative or inverting terminal of OP-AMP U2; capacitor C9 is coupled in parallel with the feedback resistor R22; and resistor R23 has one terminal coupled to the negative or inverting terminal of OP-AMP U2 and the other terminal coupled to node A. The positive or non-inverting terminal of OP-AMP U2 receives the constant reference current signal Iref from terminal 2a. 
Referring still to the schematic diagram, node A of the linear regulator 5 also has one terminal of resistor R21 coupled thereto and is adjacent to node B. The other terminal of resistor R21 is coupled to the drain of transistor or metal-oxide semiconductor field-effect transistor (MOSFET) QA1. The gate of transistor or MOSFET QA1 receives the constant reference current Iref from terminal 2b. The source of transistor or MOSFET QA1 is coupled to ground. Node B has coupled thereto one terminal of capacitor C8 and the cathode terminal of diode D8. The other terminal of the capacitor C8 is coupled to ground. The anode of diode D8 is coupled to the output terminal of OP-AMP U1.
A control output is generated at the output terminal of OP-AMP U2, the regulator""s controller, and is coupled to the gate of transistor or MOSFET Q1 via a RC lowpass filter 6 thereby providing the gate voltage VGS to the transistor or MOSFET Q1. The RC lowpass filter 6 comprises resistor R24 and capacitor C10. The first terminal of resistor R24 is coupled to the output terminal of OP-AMP U2 and to a first terminal of capacitor C10. The second terminal of capacitor C10 is coupled to ground.
The linear regulator 5 further includes resistor R20 having one terminal coupled to the second terminal of resistor R24 and to the drain of transistor or MOSFET QA2. The gate of transistor or MOSFET QA2 is coupled to the output terminal of NOT gate NG3 and the source of transistor or MOSFET QA2 is coupled to ground. The input terminal of NOT gate NG3 receives the constant reference current Iref from the terminal 2b. 
In operation, the drain-source current of transistor or MOSFET Q1, which is equal to ILED, is regulated to follow the constant reference current Iref. The linear regulator 5 in FIG. 1 works very well for a DC or a pulse-width modulated (PWM) operated LED string 8. However, when N LED strings, wherein each string includes a plurality of LEDs, are to be driven, simple duplication of the circuitry in FIG. 1 is commonly used in order to achieve equal current sharing among the N LED strings. As can be appreciated, this increases the complexity of the circuitry and controller costs of the linear regulator. Moreover, if the LED strings are operated in a PWM mode, time delay variations between the duplicated controllers and linear regulators could cause different phases among the N LED strings.
An integrated LED driving device for multiple LED strings with automatic current sharing in a DC mode and, alternately, with minimized phase delays in a PWM mode. The integrated LED driving device employs a single linear regulator or other controller for controlling a reference current and a multiple-output current mirror, which includes a plurality of transistors or MOSFETs. Each of transistors or MOSFETs are integrated on the same substrate, with almost identical width-to-length channel ratios and with identical source and gate connections. Thereby, the multiple-output mirror provides for current sharing which is almost independent of the DC input voltage source, which provides the DC input voltage VDC, independent of the MOSFET""s variation from the semiconductor integration process, and almost independent of temperature variation.